1. Field of the Invention
The present invention relates to the field of transistor driver circuits and in particular, to a low voltage differential signaling ("LVDS") driver with pre-emphasis.
2. Description of the Related Art
The constant need to transfer more information faster, accompanied by increases in data processing capability, necessitated an expansion to data transfer rates considerably higher than what was previously possible. As a consequence, a protocol referred to as 100 Base-T was developed for extending IEEE Standard 802.3 to accommodate data moving at an effective transfer rate of 100 Mbps through twisted-pair cables. Under the 100 Base-T protocol, certain control bits are incorporated into the data before it is placed on a twisted-pair cable. The result is that the data and control signals actually move through a twisted-pair cable at 125 Mbps.
One type of data transmission is differential data transmission in which the difference in voltage levels between two signal lines forms the transmitted signal. Differential data transmission is commonly used for data transmission rates greater than 100 Mbps over long distances. Noise signals shift the ground level voltage and appear as common mode voltages. Thus, the deleterious effects of noise are substantially reduced.
To standardize such data transmission various standards have been promulgated. For example, one such standard is the recommended standard 422, RS422, which is defined by the Electronics Industry of America, EIA. This standard permits data rates up to 10 million baud over a twisted pair of signal lines. Driver circuits place signals on the lines. These drivers circuits must be capable of transmitting a minimum differential signal in the range of two to three volts on the twisted pair line which typically terminates in 100 ohms of resistance.
A recently emerging recommended standard is the RS-644 standard. This is a low voltage differential signaling ("LVDS") standard which is high speed, low power, low electromagnetic interference ("EMI") and low in cost. Due to the differential implementation, the LVDS driver can be used in noisy environments.
An example of a conventional low voltage differential signaling (LVDS) driver circuit 100 is shown in FIG. 1. The difference in voltage between the output signals OUT+, OUT- on the output terminals 103, 105 forms the pair of differential signals. A pair of differential signals means two signals whose current waveforms are out of phase with one another. The individual signals of a pair of differential signals are indicated by reference symbols respectively ending with "+" and"-" notation, e.g., S+ and S-.
LVDS driver circuit 100 includes a direct current (DC) constant current source I1 coupled to voltage supply VDD, four n-channel metal oxide semiconductor (NMOS) switches M11-M14, and a resistor R1 coupled between the common node COM and voltage supply VSS. The four transistor switches M11-M14 are controlled by input voltage signals VIN1, VIN2 and direct current through load resistor Rt as indicated by arrows A and B. The input voltage signals VIN1, VIN2 are typically complementary rail-to-rail voltage swings.
The gates of NMOS switches M11 and M14 couple together to receive input voltage signal VIN1. Similarly, the gates of NMOS switches M12 and M13 couple together to receive input voltage signal VIN2.
Operation of LVDS driver circuit 100 is explained as follows. Two of the four NMOS switches M11-M14 turn on at a time to steer current from current source I1 to generate a voltage across resistive load Rt. To steer current through resistive load Rt in the direction indicated by arrow B, input signal VIN2 goes high turning on NMOS switches M12 and M13. When input signal VIN2 goes high, input signal VIN1 goes low to keep NMOS switches M11 and M14 off during the time NMOS switches M12 and M13 are on. Conversely, to steer current through resistive load Rt in the direction indicated by arrow A, input signal VIN1 goes high and is applied to transistor switches M11 and M14 to make them conduct. Input signal VIN2 goes low to keep NMOS switches M12 and M13 off during this time. As a result, a full differential output voltage swing can be achieved.
Differential LVDS driver circuit 100 may operate well at low frequencies. However, the problem arises that the output switching current is limited by DC constant current source I1. Since the switching speed of differential LVDS driver circuit 100 is proportional to the amount of drive current from current source I1, such limited drive current results in a slow switching speed of LVDS driver circuit 100. When either of the output transistors M11, M13 are switched on, the drain current responds slowly because of the limited amount of drive current. Thus, for example, when transistors M12 and M13 are switched on, there is a significant delay in the time it takes for the drain of transistor M13 to be pulled up by the current source I1 to voltage supply VDD and a significant delay in the time it takes for the source of transistor M12 to be pulled down towards voltage supply VSS. Such delay caused by the limited drive current from DC current source I1 reduces the amplitude of the differential voltage output swing at high frequencies and causes disturbances, such as noise, when LVDS driver 100 drives a heavy load, such as a long cable or a high capacitance cable.
Therefore, a need exists for an LVDS driver with an increased switching speed to maintain the DC amplitude of the voltage output swing both at high frequency and when the LVDS driver drives a heavy load.